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Status Planned for future release
Workspace Spectrum LSF
Components Scheduling
Created by Guest
Created on Jun 10, 2025

RELATED IDEAS

Consider AMD ccd/l3 cache in affinity string

Hello,

Currently, using affinity string, we can target a core, a numa, a socket or memory, but not an AMD CCD (Core Complex Dies, L3 cache shared by 8 or 16 cores)

Allowing jobs requesting less cores than available in a CCD (8 or 16 currently) to constrain to a CCD can improve drastically performance (all job processes/threads will use the shared L3 cache) .

Can you please add a new keyword in affinity string, similar to numa, core, socket,  to cover this request ?

ex using 'die' keyword to target CCD: bsub ... -n 8 -R "... affinity[core(1,same=die,exclusive=(socket, alljobs))]" <cmd>

 Regards,

        Olivier

Needed By Not sure -- Just thought it was cool
  • Guest
    Jul 25, 2025

    Hey Olivier!  Still around, peripherally any way.

    Reply
  • Admin
    Bill McMillan
    Jun 28, 2025

    Hi Olivier,
    We have a project tentatively planned for 4Q, but may slip to 1Q26, so enhance the affinity options. We'll consider this requirement as part of that project.


    Regards,

    Bill


    Reply
3 MERGED

Affinity scheduling must take L3 cache hierarchy into account

Merged
Newer CPUs have multiple L3 caches, with dedicated cores per L3 cache. Running multi-threaded jobs on all cores within a shared L3 cache can reduce runtime in our cases up 70%, compared to running over multiple L3 caches. Think of the AMD EPYC 935...
over 1 year ago in Spectrum LSF / Scheduling 4 Planned for future release
1 MERGED

Use all applicable NUMA Memory information on a machine to determine available Memory resources before dispatching a job to a machine

Merged
We were noticing that jobs were being terminated by LSF with the message: TERM_MEMLIMIT: job killed after reaching LSF memory usage limit.Exited with exit code 137. Yet, this was happening before the job had even consumed the amount of memory rese...
almost 3 years ago in Spectrum LSF / Scheduling 0 Planned for future release
4 MERGED

Add possibility to assign cores from the same CCX in AMD CPUs to make use of the same L3 cache.

Merged
With a specific 2-core workload we noticed significant performance improvements of about 50% in shorter runtime when both cores reside on the same L3 cache group (CCX) of an AMD EPYC CPU.Therefore it would be very beneficial to be able to have LSF...
over 2 years ago in Spectrum LSF / Scheduling 0 Planned for future release

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